This invention is directed to improved semiconductor devices, and in particular is directed to highly conductive semiconductor structures, such as those formed of tungsten or tungsten silicide, with reduced topographic profiles, and electrical devices incorporating same.
Tungsten (W) or Tungsten silicide (WSi) have desirable conductive and other properties making them useful in forming semiconductor structures, especially bit-line gates. In the past, due to the lack of a sufficiently selective etch process, the process illustrated in FIGS. 1 and 2 was utilized. A layer of tungsten or tungsten silicide 101 was deposited over a layer of polysilicon 102 (also referred to as poly or polySi), which was previously deposited on the substrate 103. Substrate 103 could be an oxide, for example silicon oxide-silicon nitride-silicon oxide (also referred to as ONO), itself on a silicon substrate. The polysilicon layer 102 served as a sacrificial layer to improve the etch process window during etching of the conductive layer, and also enhanced the adhesion of the W or WSi to the substrate. Hence, the polysilicon layer served as both a sacrificial layer and as an adhesive layer between the conductive layer and the substrate.
With reference to FIG. 2, following etching, the resulting conductive structure consists of an upper conductive layer 101a and an intermediate “adhesive” layer 102a on top of substrate 103. If layer 101a is formed of W, and the conductive structure forms a structure such as a bit-line gate, generally the W layer must have a thickness between about 800–2500 angstroms (Å) to be sufficiently conductive to accomplish the desired function. Generally, the intermediate or adhesive layer 102a must be at least 1000 Å to achieve optimal etching, and such previous structures have a thickness greater than about 3000 Å (i.e., the combined thickness of both the adhesive layer and the conductive layer).
However, the resulting structure of a conductive material on top of a polysilicon layer has a higher electrical resistance than desired due to the lower conductivity of the polysilicon with respect to the conductive layer, and further the structure is taller or thicker than desired, increasing the topography of the overall device, making any subsequent processing steps more difficult.
It is thus desired to have more highly conductive semiconductor structures. A highly conductive semiconductor (HCS) structure is defined herein as a structure which has a conductive layer adhered to a substrate by an intermediate adhesive layer, wherein the adhesive layer is conductive but less conductive than the conductive layer, and the conductivity of the overall structure (i.e., the conductive layer and adhesive layer) is higher than previous conductive semiconductor structures formed of a conductive layer and an adhesive layer. In order to reduce electrical resistance, it is necessary to increase the thickness of the conductive layer and/or reduce the thickness of the adhesive layer. However, due to the deficiencies of known etch processes, it was not possible to decrease the thickness of the adhesive layer below about 1000 Å because it also needed to be thick enough to act as an adequate sacrificial layer, and increasing the thickness of the overlying conductive layer was undesirable as this would increase the topography (vertical profile), cost, and overall size of the resulting structure and devices incorporating same. In view of the need for smaller devices, it desirable to reduce the size and increase the conductivity (reduce electrical resistance) of semiconductor structures, and the resulting semiconductor devices and electrical devices incorporating same.
Therefore, there is a need for highly conductive semiconductor structures that have a lower profile with respect to the underlying substrate than previous structures. There is also a need for an improved process of making such structures.